Xenomai API  2.5.6.1
include/rtdm/rtserial.h
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00001 
00077 #ifndef _RTSERIAL_H
00078 #define _RTSERIAL_H
00079 
00080 #include <rtdm/rtdm.h>
00081 
00082 #define RTSER_PROFILE_VER               3
00083 
00088 #define RTSER_DEF_BAUD                  9600
00089 
00095 #define RTSER_NO_PARITY                 0x00
00096 #define RTSER_ODD_PARITY                0x01
00097 #define RTSER_EVEN_PARITY               0x03
00098 #define RTSER_DEF_PARITY                RTSER_NO_PARITY
00099 
00105 #define RTSER_5_BITS                    0x00
00106 #define RTSER_6_BITS                    0x01
00107 #define RTSER_7_BITS                    0x02
00108 #define RTSER_8_BITS                    0x03
00109 #define RTSER_DEF_BITS                  RTSER_8_BITS
00110 
00116 #define RTSER_1_STOPB                   0x00
00117 
00118 #define RTSER_1_5_STOPB                 0x01
00119 #define RTSER_2_STOPB                   0x01
00120 #define RTSER_DEF_STOPB                 RTSER_1_STOPB
00121 
00127 #define RTSER_NO_HAND                   0x00
00128 #define RTSER_RTSCTS_HAND               0x01
00129 #define RTSER_DEF_HAND                  RTSER_NO_HAND
00130 
00136 #define RTSER_FIFO_DEPTH_1              0x00
00137 #define RTSER_FIFO_DEPTH_4              0x40
00138 #define RTSER_FIFO_DEPTH_8              0x80
00139 #define RTSER_FIFO_DEPTH_14             0xC0
00140 #define RTSER_DEF_FIFO_DEPTH            RTSER_FIFO_DEPTH_1
00141 
00147 #define RTSER_TIMEOUT_INFINITE          RTDM_TIMEOUT_INFINITE
00148 #define RTSER_TIMEOUT_NONE              RTDM_TIMEOUT_NONE
00149 #define RTSER_DEF_TIMEOUT               RTDM_TIMEOUT_INFINITE
00150 
00156 #define RTSER_RX_TIMESTAMP_HISTORY      0x01
00157 #define RTSER_DEF_TIMESTAMP_HISTORY     0x00
00158 
00164 #define RTSER_EVENT_RXPEND              0x01
00165 #define RTSER_EVENT_ERRPEND             0x02
00166 #define RTSER_EVENT_MODEMHI             0x04
00167 #define RTSER_EVENT_MODEMLO             0x08
00168 #define RTSER_DEF_EVENT_MASK            0x00
00169 
00176 #define RTSER_SET_BAUD                  0x0001
00177 #define RTSER_SET_PARITY                0x0002
00178 #define RTSER_SET_DATA_BITS             0x0004
00179 #define RTSER_SET_STOP_BITS             0x0008
00180 #define RTSER_SET_HANDSHAKE             0x0010
00181 #define RTSER_SET_FIFO_DEPTH            0x0020
00182 #define RTSER_SET_TIMEOUT_RX            0x0100
00183 #define RTSER_SET_TIMEOUT_TX            0x0200
00184 #define RTSER_SET_TIMEOUT_EVENT         0x0400
00185 #define RTSER_SET_TIMESTAMP_HISTORY     0x0800
00186 #define RTSER_SET_EVENT_MASK            0x1000
00187 
00194 #define RTSER_LSR_DATA                  0x01
00195 #define RTSER_LSR_OVERRUN_ERR           0x02
00196 #define RTSER_LSR_PARITY_ERR            0x04
00197 #define RTSER_LSR_FRAMING_ERR           0x08
00198 #define RTSER_LSR_BREAK_IND             0x10
00199 #define RTSER_LSR_THR_EMTPY             0x20
00200 #define RTSER_LSR_TRANSM_EMPTY          0x40
00201 #define RTSER_LSR_FIFO_ERR              0x80
00202 #define RTSER_SOFT_OVERRUN_ERR          0x0100
00203 
00210 #define RTSER_MSR_DCTS                  0x01
00211 #define RTSER_MSR_DDSR                  0x02
00212 #define RTSER_MSR_TERI                  0x04
00213 #define RTSER_MSR_DDCD                  0x08
00214 #define RTSER_MSR_CTS                   0x10
00215 #define RTSER_MSR_DSR                   0x20
00216 #define RTSER_MSR_RI                    0x40
00217 #define RTSER_MSR_DCD                   0x80
00218 
00225 #define RTSER_MCR_DTR                   0x01
00226 #define RTSER_MCR_RTS                   0x02
00227 #define RTSER_MCR_OUT1                  0x04
00228 #define RTSER_MCR_OUT2                  0x08
00229 #define RTSER_MCR_LOOP                  0x10
00230 
00237 #define RTSER_BREAK_CLR                 0x00
00238 #define RTSER_BREAK_SET                 0x01
00239 
00240 
00244 typedef struct rtser_config {
00246         int             config_mask;
00247 
00249         int             baud_rate;
00250 
00252         int             parity;
00253 
00255         int             data_bits;
00256 
00258         int             stop_bits;
00259 
00261         int             handshake;
00262 
00264         int             fifo_depth;
00265 
00266         int             reserved;
00267 
00270         nanosecs_rel_t  rx_timeout;
00271 
00274         nanosecs_rel_t  tx_timeout;
00275 
00277         nanosecs_rel_t  event_timeout;
00278 
00280         int             timestamp_history;
00281 
00284         int             event_mask;
00285 } rtser_config_t;
00286 
00290 typedef struct rtser_status {
00292         int             line_status;
00293 
00295         int             modem_status;
00296 } rtser_status_t;
00297 
00301 typedef struct rtser_event {
00303         int             events;
00304 
00306         int             rx_pending;
00307 
00309         nanosecs_abs_t  last_timestamp;
00310 
00312         nanosecs_abs_t  rxpend_timestamp;
00313 } rtser_event_t;
00314 
00315 
00316 #define RTIOC_TYPE_SERIAL               RTDM_CLASS_SERIAL
00317 
00318 
00322 #define RTDM_SUBCLASS_16550A            0
00323 
00348 #define RTSER_RTIOC_GET_CONFIG  \
00349         _IOR(RTIOC_TYPE_SERIAL, 0x00, struct rtser_config)
00350 
00378 #define RTSER_RTIOC_SET_CONFIG  \
00379         _IOW(RTIOC_TYPE_SERIAL, 0x01, struct rtser_config)
00380 
00404 #define RTSER_RTIOC_GET_STATUS  \
00405         _IOR(RTIOC_TYPE_SERIAL, 0x02, struct rtser_status)
00406 
00425 #define RTSER_RTIOC_GET_CONTROL \
00426         _IOR(RTIOC_TYPE_SERIAL, 0x03, int)
00427 
00445 #define RTSER_RTIOC_SET_CONTROL \
00446         _IOW(RTIOC_TYPE_SERIAL, 0x04, int)
00447 
00470 #define RTSER_RTIOC_WAIT_EVENT  \
00471         _IOR(RTIOC_TYPE_SERIAL, 0x05, struct rtser_event)
00472 
00494 #define RTSER_RTIOC_BREAK_CTL   \
00495         _IOR(RTIOC_TYPE_SERIAL, 0x06, int)
00496 
00506 #endif /* _RTSERIAL_H */
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